Logic device/transceiver/encoder

The MC14043B and MC14044B quad R-S latches are constructed using MOS P-channel and N-channel enhancement mode devices in a monolithic structure. Each latch has an independent Q output as well as set and reset inputs. The Q output is gated through a three-state buffer with a common enable input. These outputs are enabled with a logic '1' or high on the enable input; a logic '0' or low will latch from the Q output port, creating an open circuit at the Q output.

SN74LVC1G58 Configurable Multifunction Door

CD74HC00 High Speed ​​CMOS Logic Quad 2 Input NAND Gate

SN74HC125 Quad Bus Buffer Gate with Three-State Outputs

74AVC4T245PW: 4-bit dual supply translating transceiver with configurable voltage translation;

CD74HC138 High Speed ​​CMOS Logic 3 to 8 Line Decoder Demux (Inverting and Non-inverting)