onsemi (Ansemi)

PLCC-28

taping

500

The MC10E/100E131 is a quad master-slave D-type flip-flop with differential outputs. Each flip-flop can be clocked individually by holding the common clock (CC) low and using the clock enable (CEbar) input. Common timing is achieved by holding the CEbar input low and using CC to time all four flip-flops. In this case, the CEbar input performs the function of controlling a common clock for each flip-flop. A separate asynchronous reset (R) is provided. Asynchronous setup controls are grouped together in pairs, with the pairing chosen to reflect the symmetry of the physical chip. When both CC and CEbar are low, data goes to the master, and when either CC or CEbar (or both) is high, data is transferred to the slave. The 100 Series includes temperature compensation.