Memory chip

The CAT24C256 is an EEPROM serial 256-Kb I2C internally organized as 512 pages of 64 bytes each. It has a 64-byte page write cache and supports standard (100 kHz), fast (400 kHz), and ultra-fast (1 MHz) I2C protocols. Write operations can be disabled by pulling the WP pin high (this protects the entire memory). External address pins make it possible to place up to eight CAT24C256 devices on the same bus. On-chip ECC (Error Correction Code) makes the device suitable for high-reliability applications.

64-Kbit (8K x 8bit), I2C interface, working voltage: 1.8V to 5.5V