Memory chip

The N24S64 is a 64-Kb CMOS serial EEPROM internally organized as 8,192 words of 8 bits each. It has a 32-byte page write buffer and supports Standard (100 kHz), Fast (400 kHz), and Fast-Plus (1 MHz) I2C protocols. The devices also feature a 128-bit factory-set read-only unique ID, a 32-byte security data page that can be permanently locked against future changes, and software write protection of the entire array. The device configuration register allows the user to specify the last 3 bits of the device address, allowing eight N24S64 devices to be placed on the same bus.