Logic device/transceiver/encoder

CD4023B CMOS triple 3-input NAND gate

The MM74HC240 3-state buffers utilize advanced silicon-gate CMOS technology. It has a high drive current output, enabling high speed operation even when driving large bus capacitances. These circuits are comparable in speed to low-power Schottky devices, while maintaining the advantages of CMOS circuits, such as high noise immunity and low power consumption. The device has a fanout of 15 LS-TTL equivalent inputs. The MM74HC240 is an inverting buffer with two active low enable pins (1G# and 2G#). Each enable pin can independently control 4 buffers. All inputs are connected to V

SN74ACT86 Quad 2-Input Exclusive-OR Gate

2-Channel, 4-Input, 4.75V to 5.25V Bipolar NAND Gate

SN74HCT244 Octal Buffer and Line Driver with 3-State Outputs

The MC14490 is built using complementary MOS enhancement mode devices to eliminate excessive level changes when interfacing with mechanical contacts. The digital contact bounce eliminator circuit takes an input signal from a bounce contact and generates a clear digital signal four clock periods after the input is stable. The bounce eliminator circuit will remove bounce on the "closed" and "open" contact housings. The running clock of the MC14490 is derived from an internal R-C oscillator that requires only one external capacitor to adjust for the desired running frequency (bounce delay). The clock can also be driven from an external clock source or from another MC14490's oscillator (see Figure 5). Note: Immediately after power-up, the output of the MC14490 goes into an indeterminate state.

6-Channel 4.5-V to 5.5-V Inverter 14-PDIP -55 to 125 with TTL Compatible CMOS Inputs