Logic device/transceiver/encoder

MC74HC259A has the same pinout as LS259. The device inputs are compatible with standard CMOS outputs; pull-up resistors are included for compatibility with LSTTL outputs. The HC259A has four modes of operation as shown in the mode selection table. In Addressable Latch Mode, the data on the data input will be written to the addressed latch. Addressed latches carry forward the data input, and all unaddressed latches remain in their previous state. In memory mode, all latches remain in their previous state, independent of data or address inputs. In 1/8 decode or signal split mode, the addressed output follows the state of the data input, all other outputs are low state. In reset mode, all outputs are low regardless of address and data inputs. When the HC259A is operating as an addressable latch, changing multiple bits of the address may cause a transient wrong address. Therefore, such changes should be done in memory mode.

16-Bit Bus Transceiver with 3-State Output 48-TSSOP -40 to 85

SN74F373 Octal D-Class Transparent Latch

The EP16VA is a world-class differential driver/receiver. This device is functionally identical to the EP16 and LVEP16 devices, but with a high-gain output. The DC gain of the QHG and QHGbar outputs is several times higher than that of the EP16. Only the VBB pin, the internally generated supply voltage, is provided for this device. In the case of single-ended inputs, tie the unused differential input to VBB as the switch reference voltage. VBB can also re-bias the AC-coupled input. When used, decouple VBB and VCC with 0.01 µF capacitors and limit source/sink current to 0.5 mA. VBB should be left open when not in use. In an open input condition (pull to VEE), an internal input clamp will force the QHG output low. For differential inputs under no-signal conditions, special considerations must be taken to prevent instability. The 100 series includes temperature compensation.