Logic device/transceiver/encoder

Enhanced Product Single 2-Input, 1.65V to 5.5V AND Gate 5-SC70 -55 to 125

4-Channel, 2-Input, 2V to 6V AND Gate 14-SSOP -40 to 85

4-Channel, 2-Input, 1.65V to 3.6V NAND Gate 14-TSSOP -40 to 125

The MC14043B and MC14044B Quad R-S Latch utilizes a monolithic structure constructed using MOS P-channel and N-channel enhancement mode devices. Each latch has an independent Q output as well as set and reset inputs. The Q output is gated through a three-state buffer with a common enable input. These outputs are enabled with a logic '1' or a high level on the enable input; a logic '0' or low level disconnects the latch from the Q output, creating an open circuit at the Q output.