Logic device/transceiver/encoder

4-Channel, 2-Input, 2V to 5.5V OR Gate 14-SOIC -40 to 125

Single 13 Input, 4.5V to 5.5V Bipolar NAND Gate 16-SOIC 0 to 70

4-Channel, 2-Input, 4.5V to 5.5V NAND Gate with TTL Compatible CMOS Inputs 14-TSSOP -40 to 85

The MC14043B and MC14044B Quad R-S Latch utilizes a monolithic structure constructed using MOS P-channel and N-channel enhancement mode devices. Each latch has an independent Q output as well as set and reset inputs. The Q output is gated through a three-state buffer with a common enable input. These outputs are enabled with a logic '1' or a high level on the enable input; a logic '0' or low level disconnects the latch from the Q output, creating an open circuit at the Q output.

18-Bit Universal Bus Transceiver with 3-State Outputs 56-SSOP -40 to 85

3.3V ABT Octal Bus Transceiver with 3-State Output 20-SOIC -40 to 85