Communication interface chip UART485/232

8-bit 2.3V to 5.5V I2C/SMBus I/O expander with interrupt and configuration registers 16-TVSOP -40 to 85

1:16 LVDS Clock Fanout Buffer 64-TSSOP -40 to 85

This quad driver is suitable for high-speed interconnects using low-voltage differential signaling (LVDS) technology. The driver level translates LVTTL signals to LVDS levels with a typical differential output swing of 350mV, providing low EMI and ultra-low power consumption even at high frequencies. This device is suitable for high-speed transmission of clock and data. The FIN1047 can be paired with its companion receiver, the FIN1048, or any other LVDS receiver.

DS91M040 125 MHz Quad M-LVDS Transceiver