Communication interface chip UART485/232

USB UART asynchronous serial data transmission chip, qfn-32, tray

Communication > Protocols and Networks > PHY

This quad receiver is suitable for high-speed interconnects using low-voltage differential signaling (LVDS) technology. The receiver translates LVDS levels with a typical differential input threshold of 100 mV to LVTTL signal levels. Even at high frequencies, LVDS provides low EMI and ultra-low power consumption. This device is suitable for high-speed transmission of clock and data. The FIN1048 can be paired with its companion driver, the FIN1047, or any other LVDS driver.

The FSA3357 is a high-performance, single-pole, three-throw (SP3T) analog switch or 3:1 multiplexer/demultiplexer. The device is fabricated using an advanced sub-micron CMOS process to achieve high-speed enable and disable times and low on-resistance. A break-before-make select circuit prevents interruption of the signal on the B0, B1, or B2 ports because these switches remain temporarily enabled while the select pin switches the device. The device is specified to operate from 1.65 to 5.5V VCC. The control input is tolerant to 5.5V regardless of the VCC operating range.

CD4066B CMOS Quad Bidirectional Switch