Communication interface chip UART485/232

Stereo Codec with Linear Output (S/W Control) 28-SSOP

Industrial CAN Transceiver 8-SOIC -40 to 85

This driver and receiver pair is suitable for high-speed interconnects using low-voltage differential signaling (LVDS) technology. The driver translates LVTTL signals to LVDS levels with a typical differential output swing of 350mV, and the receiver converts the LVDS signals to LVTTL levels with a typical differential input threshold of 100mV. Even at high frequencies, LVDS technology provides low EMI and ultra-low power consumption. This device is suitable for high-speed transmission of clock or data.

Octal LVDS Receiver 38-TSSOP 0 to 70